SAP-1 Simulator

Updated 10 Oct 26

I wrote a while ago about a home-built 8-bit computer, the SAP-1, with an example of a simple program to add together the contents of two memory addresses.

I was thinking about this again earlier today and wondering if anyone had written a simulation of the machine. Well, I've found one of sorts here, where ones for the SAP-2 and for a Turing Machine can also be found.

Why 'of sorts'? Because it's high-level, so we don't get to see the microcode beneath the instructions. This also means you can't add to the instruction set (something that can be done on the original machine), so unfortunately there's no support for looping (jump) nor for logic (conditional jump), both of which are really essential requirements.

Here's a simulation of that program mentioned earlier, with the decimal values 28 in address 14 and 14 in address 15 and the output decimal 42 after running it. (I'm not sure about the decimal 14 in the accumulator though). See the first link above for a detailed breakdown of the microcode steps involved.

A home-built 4-bit transistor computer

Here's another terrific home-built computer project, but this time a 4-bit one using transistors - over 960 of them! It holds just 10 bytes of memory - just over half that of Ben Eater's SAP-1. I wonder what can be done with that?

A (constrained) home-built 8-bit computer

Updated 11 Oct 26

It's this one, of course, by YouTuber Ben Eater. It's IC-based, with not a transistor in sight. I've had a good look at some of his excellent videos, in particular the ones about the registers, the ALU (AU really) and CPU control logic. He even gets to write his own operation codes, micro instructions and assembly language!

His computer is based on one of the machines (the SAP-1) in the book Digital Computer Electronics by Albert Paul Malvino. It has a proper computer architecture and seems very much designed from the top down, whereas I was thinking of moving in the opposite direction, from the arithmetic unit (see a previous post).

It's intended to demonstrate how computers work - the machine can be stepped through instructions one clock cycle at a time and there are LEDs to show the contents of stores. Unfortunately, it's severely limited by having just 16 bytes of program memory, resulting from 4-bit memory addresses. I wonder why a full 8 bits weren't used, to give 256 bytes of memory? You could write some interesting programs with that! (The next computer in the book, the SAP-2, can address up to 64k bytes of memory, btw). 

I suppose having much more capacity for storing programs could highlight how tricky it is to program with those small dip switches, so larger ones would be needed. A punched paper tape machine and reader would be very useful, if unlikely, additions, but in the absence of those, I think a modern means of programming the EEPROM is quite permissible, as indeed the builder shows with an Arduino. And a ROM with routines for multiplication and division and handling of decimal numbers would be cool, too. 

The following notes are here really for my own benefit.

Some key features/highlights:

• an arithmetic unit (AU) supporting addition and subtraction
• two registers, A and B, the contents of which are automatically added into the AU
• registers and other stores can receive (load) and send (enable) contents
• communication between pairs of stores is via an 8-bit bus, one store in send mode, one store in receive mode - no need for point-to-point wiring, hence expandable
• use of tri-state (0, 1, disconnected) gates to control which stores can send (and receive?) data at a time
• 16 bytes* for program storage (in EEPROM), each byte comprising:
• a program line: 4 bits for instruction, 4 bits for associated data
• a data/variables, typically after lines of code: 4 bits
• programming via dip switches (for memory location and content)

*limited by the use of a 4 bit Memory Address Register.

Program instructions

The machine in the book provides the following operations:

• ADD
• HALT
• LDA (load A register)
• SUB                        
• OUT (send contents of A register to output on 3 digit decimal display)

The builder adds these:

• JC (conditional jump) 
• JMP (jump)
• LDI ("load immediate")
• STA ("store accumulator")

These are each implemented by several steps of micro instructions, stored (semi-permanently) in EEPROM:

• AI (A register in)
• AO (A register out)
• BI (B register in; there seems to be no corresponding B register out)
• CE (program counter enable - increments counter)
• CO (program counter out)
• EO (AU sum/sigma out)
• HLT (halt)
• II (instruction register in)
• IO (instruction register out - lower 4 data bits only)
• J (jump)
• MI (memory address register in)
• OI ?
• RI (ram in)
• RO (ram out)
• SU (subtract signal?)

Note that most of these micro instructions simply send data from the output of one store to the input of another, i.e. they act as virtual wires. In fact, before building the control logic, Ben Eater demonstrates here exactly what is required of it by making direct connections between the relevant input and output gates:

Each instruction is first fetched into the instruction register by the following micro instructions:

• CO MI (puts the program counter into the memory address register)
• RO II CE (puts the instruction into the instruction register and increments the program counter)

Simple worked example provided by the builder:

This program adds two numbers, stored in RAM, together. 

Here are the micro instructions, in two steps, for the operation LDA 14 (load contents of memory location 14 into the A register):

• IO MI (loads data portion (lower 4 bits) of the instruction (14) into the Memory Address Register)
• RO AI (sends data at this memory location to the A register, from where it is automatically added to the AU)

If memory location 14 holds the number 28, then the A register and AU both contain 28.

Then ADD 15 (add the contents of memory location 15 to the AU, after being fetched), comprises the following micro instructions:

• IO MI (loads data portion (lower 4 bits) of the instruction (15) into memory address register)
• RO BI (sends data at this memory location to the B register, from where it is automatically added to the AU)*
• EO AI (sends data from the AU to the A register).**

*If memory location 15 holds the number 14, then the B register contains 14 and AU 42, ie. it has added the contents of the registers together. The rest of the code copies that data to output for decimal display.

** The A register now contains 42 and that number will also be added to the AU, but that is ignored here

Then OUT, to display the output, after being fetched:

• AO OI

It may seem that's a lot of steps to achieve fairly little - after all just entering the required data directly to registers A and B would have resulted in the AU displaying the answer, albeit in binary, automatically. That said, the author also provides a program to multiply two numbers and another to generate Fibonacci numbers. These and a couple of others can be seen here, for example.

(The Fibonacci one could be done in hardware alone by connecting the output of the AU to the input of the A register, i.e. equivalent to micro instruction EO AI, entering the number 1 into the A register and then starting the clock. We'd just need to make sure that automatic updating of the AU by the A register is disabled while AU itself updates the A register).

More thoughts on a vintage computer demonstration model

Updated 18 Feb 26

Recently I took another look at the book Computer Models, by A. Wilkinson, published in 1968 and mentioned in an earlier post. On page 107, in a section titled Suggestions for Further Development, the author notes the limitations of his model, which is essentially a very simple calculator, and says a programme of instructions to be arranged and carried out ... is essential if the model is to do a complete programming job. 

Indeed and this makes me wonder what the simplest programmable transistor-based computer would comprise? What instruction set would it need? The author's machine can already be told to add and subtract. There is a shift register operation too under the covers, so let's make that available. A compare instruction for logic, is needed of course. And ones to move data (numbers) between storage areas. No doubt others too - a look at the Diehl calculators is needed.

Let's number those instructions. The simplest form of programming would be a sequence of individual steps on a sheet of paper for an operator to carry out, each comprising an instruction number (selected by a rotary switch perhaps) and a piece of data, according to an agreed syntax, followed by the operator pressing a button to run that step. To use logic (repeated addition for a multiplication program, say), the operator would need to jump to another location on the sheet. By default we could put, say, '+1' at the end of each instruction to tell the operator to move to the next step. If we need to jump, then it would be plus or minus some other number.

Or write the program on a punched card, pushed into a reader, either by the operator or automatically (I'm thinking of Computacar from ~1970!) one low-level instruction step at a time. This reader could be opto-electronic or electro-mechanical. Handling jump instructions would be tricky though.

This could be a very interesting project!

A vintage binary electronic adder & counter project

Originally posted on the RetroMat website, but fits better here.

Updated 9 Oct 26

Also replaces an earlier blog posting, but keeps the time-stamp.

I may at some point try to re-create either the BEATLE machine or the one described in the book. In the meantime, I've started a page on the RetroMat website with some simple circuits based on the literature.

=====

Or A Binary Electronic Adder with Transistorized Logical Elements (BEATLE).

This is prompted by memories I have of a project that I and other pupils contributed to at Wellsway School around 1973/4. It was led by our Maths teacher Mr. Grace. Before I started to investigate, as far as I could recall:

• the machine had a binary counter with lights, could possibly perform simple binary arithmetic and could be used to test logical propositions
• it was based on one described in a magazine article from a few years before, referring to it by the acronym BEATLE (well done to whoever was responsible for that!)
• it made extensive use of flip-flops for memory. This was the first time I had come across the term and I remember soldering one or two of these
• the counter could be driven by a high frequency signal and hence act as a clock or timer, the first light in the chain seemingly permanently on, with the next one flickering rapidly and the ones after that flashing ever more slowly, at half the rate each time.

After some research, I found mention of the machine (indeed called BEATLE!) in a book, Teaching School Mathematics, edited by W. Servais and T. Varga, published in 1971 by Penguin Books & Unesco. In turn, the book refers to two articles by A. Wilkinson, a teacher, in the journal Mathematics Teaching, published by the Association of Teachers of Mathematics:

• MT 31, Summer 1965: A Small Computer Demonstration Model (i.e. the BEATLE)
• MT 32, Autumn 1965: A Computer Logic Demonstration Board

In addition, in the first article the author refers to another article in the previous journal:

MT 30, Spring 1965: A System of Logic to Aid in Teaching Mathematics, by G.J. Flanagan & L.Molyneux of the University of Newcastle-upon-Tyne.

These journals are available online, but are behind a paywall.

At the core of the BEATLE is a toggle flip-flop, that is used as a divide-by-two circuit and is referred to as a scale-of-two. It is built using NOR gates. 

The machine comprises the following main units:

• a Binary Arithmetic Unit: a binary counter with 9 scale-of-two units to accumulate and display sums (up to 511) of the numbers input
• a store: a binary counter with 5 scale-of-two units which stores the twos complement of the number to be added
• a pulse clock to increment the contents of the BAU and store 
• a control panel to allow decimal numbers in the range 1 to 9 to be input via switches or a rotary dial, and with a button to start the addition of the input number selected
• a so-called routing network: twos complement wiring between the switches/rotary dial to the elements of the store.

The mechanism to add the contents of the store to the BAU is interesting, if limited:

• a decimal number, n, 1 to 9, is entered by the user
• 32 - n is put into the store (9/10/26 - in binary)
• an Add button starts the addition by means of an electronic switch, an AND gate, with input from the Add button and pulse clock
• for each pulse of the clock, the contents of the BAU and store are incremented by 1
• after n pulses of the clock, the content of the BAU has increased by n and that of the store has become 0
• when the store contains 0, the electronic switch is set to OFF and the pulses from the clock no longer get through to the store and BAU.

The computer logic demonstration board is a set of NOR gates that can be wired together to form logical circuits such as half or full adders. It can also be used to model logical puzzles and, when connected to the BEATLE machine, to solve them. When a solution is found, the appropriate lights are lit and the machine stops - reminiscent then of the code-solving machines at Bletchley Park during the war!

Comments:

• although referred to as a computer demonstration model, I don't think it merits that description: while the functions can be enhanced through wiring of new logical elements, it cannot be programmed
• using this method of addition, the input number range could be extended up to 16 without increasing the size of the store
• although not mentioned in the article, the machine could be modified to subtract numbers as well: a subtract button could allow the input number n to be stored directly, using a different routing network, but some extra logic would be needed to handle the unwanted digit arising from using this method. 
• the decimal number input method cannot be scaled up easily to large numbers, so is clearly limited in practice. Perhaps it should be replaced by binary input only and the twos complement obtained by extra logic to invert the number (easily done with NOR gates) and then to add one (but how?)?

I have also found the following relevant publications:

• Electronic Engineering magazine, July 1964: A Low Speed Single Supply Logic System, also by G.J. Flanagan & L.Molyneux. Useful background to the NOR gate implementation. Can be downloaded for free from here.
• Computer Models, also by Wilkinson, published in 1968 by Edward Arnold (Publishers) Ltd. Describes a later machine which performs addition and subtraction using half and full adders and shift registers. The author also shows how it can be enhanced to multiply two numbers, or to compare them. Can be downloaded for free from here.